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Product Specification Highly Integrated Green-Mode PWM Controller
SG5842A/JA
To minimize standby power consumption, a proprietary green-mode function provides off-time modulation to continuously decrease the switching frequency at light-load conditions. To avoid acoustic-noise problem, the minimum PWM frequency set above 22KHz. This green-mode function enables the power supply to meet international power conservation requirements. To further reduce power consumption, SG5842A/JA is manufactured using the BiCMOS process. This allows a low start-up current, around 14A, and an operating current of only 4mA. As a result, a large start-up resistance can be used. The SG5842A/JA built-in synchronized slope compensation achieves stable peak-current-mode control. SG5842JA integrates a frequency hopping function that helps reduce EMI emission of a power supply with minimum line filters. SG5842A/JA provides many protection functions. In addition to cycle-by-cycle current limiting, the internal open-loop protection circuit ensures safety should an open loop or output short-circuit failure occur. PWM output is disabled until VDD drops below the UVLO lower limit, then the controller starts again. As long as VDD exceeds about 24V, the internal OVP circuit is triggered. An external NTC thermistor can be applied for over-temperature protection. SG5842A/JA is available in an 8-pin DIP or SOP package.
FEATURES
Green-Mode PWM Controller Low Start-up Current (14A) Low Operating Current (4mA) Programmable PWM Frequency with Hopping (5842JA) Peak-Current-Mode Control Cycle-by-Cycle Current Limiting Synchronized Slope Compensation Leading-Edge Blanking Constant Output Power Limit Totem Pole Output with Soft Driving VDD Over-Voltage Protection (OVP) Programmable Over-Temperature Protection (OTP) Internal Latch Circuit (OTP, OVP) Internal Open-Loop Protection VDD Under-Voltage Lockout (UVLO) GATE Output Maximum Voltage Clamp (18V)
APPLICATIONS
General-purpose switch mode power supplies and flyback power converters, including: Notebook Power Adapters Open-Frame SMPS
DESCRIPTION
The highly integrated SG5842A/JA series of PWM controllers provides several features to enhance the performance of flyback converters.
TYPICAL APPLICATION
SG5842A/JA
(c) System General Corp. Version 1.4.2 (IAO33.0026.B6)
-1-
www.sg.com.tw * www.fairchildsemi.com October 30, 2007
Product Specification Highly Integrated Green-Mode PWM Controller
SG5842A/JA PIN CONFIGURATION
MARKING DIAGRAMS
H: J = with Frequency Hopping Null = without Frequency Hopping T: D = DIP, S = SOP P: Z = Lead Free Null = regular package XXXXXXXX: Wafer Lot Y: Year; WW: Week V: Assembly Location
GND FB VIN RI
GATE VDD SENSE RT
SG5842HATP
XXXXXXXXYWWV
ORDERING INFORMATION
Part Number
SG5842JASZ SG5842JADZ SG5842ASZ (Preliminary) SG5842ADZ (Preliminary
OTP Latch OVP Latch Frequency Hopping Pb-Free
Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes No No
Package
8-Pin SOP 8-Pin DIP 8-Pin SOP 8-Pin DIP
PIN DESCRIPTIONS
Pin No. Symbol
1 GND
Function
Ground
Description
Ground. The signal from the external compensation circuit is fed into this pin. The PWM duty cycle is determined in response to the signal from this pin and the current-sense signal from Pin 6. If FB voltage exceeds the threshold, the internal protection circuit disables PWM output after a predetermined delay time. For start-up, this pin is pulled high to the rectified line input via a resistor. Since the start-up current requirement of the SG5842A/JA is very small, a large start-up resistance can be used to minimize power loss. A resistor connected from the RI pin to GND pin provides a constant current source. This determines the center PWM frequency. Increasing the resistance reduces PWM frequency. Using a 26K resistor results in a 65KHz center PWM frequency. For over-temperature protection. An external NTC thermistor is connected from this pin to the GND pin. The impedance of the NTC decreases at high temperatures. Once the voltage of the RT pin drops below a fixed limit, PWM output is latched off. Current sense. The sensed voltage is used for peak-current-mode control and cycle-by-cycle current limiting. Power supply. The internal protection circuit disables PWM output if VDD is over-voltage. The totem-pole output driver for the power MOSFET, which is internally clamped below 18V.
2
FB
Feedback
3
VIN
Start-up Input
4
RI
Reference Setting Temperature Detection Current Sense Power Supply Driver Output
5
RT
6 7 8
SENSE VDD GATE
(c) System General Corp. Version 1.4.2 (IAO33.0026.B6)
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Product Specification Highly Integrated Green-Mode PWM Controller
SG5842A/JA
BLOCK DIAGRAM
5842JA only
(c) System General Corp. Version 1.4.2 (IAO33.0026.B6)
-3-
www.sg.com.tw * www.fairchildsemi.com October 30, 2007
Product Specification Highly Integrated Green-Mode PWM Controller
SG5842A/JA
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter
VVDD VVIN VFB VSENSE VRT VRI PD R JA TJ TSTG TL VESD,HBM VESD,MM Supply Voltage Input Terminal Input Voltage to FB Pin Input Voltage to SENSE Pin Input Voltage to RT Pin Input Voltage to RI Pin Power Dissipation (TA < 50C ) Thermal Resistance (Junction-to-Air) Operating Junction Temperature Storage Temperature Range Lead Temperature (Wave Soldering or Infrared, 10 Seconds) Electrostatic Discharge Capability, Human Body Model Electrostatic Discharge Capability, Machine Model
Value
30 30 -0.3 to 7.0 -0.3 to 7.0 -0.3 to 7.0 -0.3 to 7.0 DIP SOP DIP SOP 800.0 400.0 82.5 141.0
Unit
V V V V V V mW C/W C C C KV V
-40 to +125 -55 to +150 260 3.0 250
* All voltage values, except differential voltages, are given with respect to GND pin. * Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device.
RECOMMENDED OPERATING CONDITIONS
Symbol
TA
Parameter
Operating Ambient Temperature
Value
-20 to +85
Unit
C
* For proper operation.
ELECTRICAL CHARACTERISTICS
VDD = 15v, TA = 25C, unless otherwise noted.
VDD Section
Symbol
VDD-OP VDD-ON VDD-OFF IDD-ST IDD-OP VDD-OVP tD-OVP IDD-H
Parameter
Continuously Operating Voltage Start Threshold Voltage Minimum Operation Voltage Start-up Current Operating Supply Current VDD Over-Voltage Protection VDD Over-Voltage Protection Debounce Time Holding Current After OVP/OTP Latch-up
Test Condition
Min.
15.5 9.5
Typ.
16.5 10.5 14 4
Max.
20 17.5 11.5 30 5 25.2 65.0
Unit
V V V A mA V s A
VDD=VDD-ON-0.16V VDD=15V, RI=26K, GATE=OPEN 23.2 RI=26K VDD=5V 40.0
24.2 100 52.5
RI Section
Symbol
RINOR RIMAX RIMIN
Parameter
RI Operating Range Maximum RI Value for Protection Minimum RI Value for Protection
Test Condition
Min.
15.5
Typ.
230 10
Max.
36.0
Unit
K K K
(c) System General Corp. Version 1.4.2 (IAO33.0026.B6)
-4-
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Product Specification Highly Integrated Green-Mode PWM Controller
SG5842A/JA
Oscillator Section
Symbol
FOSC tHOP FOSC-G FDV FDT
Parameter
Normal PWM Frequency Hopping Period Green-Mode Minimum Frequency Frequency Variation vs. VDD Deviation Frequency Variation vs. Temperature Deviation Center Frequency Hopping Range
Test Condition
RI=26K RI=26K (5842JA only) RI=26K (5842JA only) RI=26K VDD=11.5V to 20V TA=-20 to 85C
Min.
62 3.7 3.9 18
Typ.
65 4.2 4.4 22
Max.
68 4.7 4.9 25 5 5
Unit
KHz ms KHz % %
Feedback Input Section
Symbol
AV ZFB VFB-OPEN VFB-OLP tD-OLP VFB-N VFB-G
Parameter
FB Input to Current Comparator Attenuation Input Impedance Output High Voltage FB Open-Loop Trigger Level FB Open-Loop Protection Delay Green-Mode Entry FB Voltage Green-Mode Ending FB Voltage
Test Condition
Min.
1/4.5 4
Typ.
1/4.0
Max.
1/3.5 7 5.4
Unit
V/V K V V ms V V
FB pin open RI=26K RI=26K RI=26K
5.5 5.0 50 1.9 56 2.1 VFB-N-0.5 62 2.3
Current Sense Section
Symbol
ZSENSE VSTHFL VSTHVA DCYSAW tPD tLEB
Parameter
Input Impedance Current Limit Flatten Threshold Voltage Current Limit Valley Threshold Voltage Duty Cycle of SAW Limit Propagation Delay to GATE Output Leading-Edge Blanking Time
Test Condition
Min.
0.85
Typ.
12 0.90 0.22 45 150
Max.
0.95
Unit
K V V %
VSTHFL-VSTHVA Maximum Duty Cycle RI=26K RI=26K 200
200 350
ns ns
270
(c) System General Corp. Version 1.4.2 (IAO33.0026.B6)
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Product Specification Highly Integrated Green-Mode PWM Controller
SG5842A/JA
GATE Section
Symbol
DCYMAX VGATE-L VGATE-H tr tf IO VGATE-CLAMP
Parameter
Maximum Duty Cycle Output Voltage Low Output Voltage High Rising Time Falling Time Peak Output Current Gate Output Clamping Voltage
Test Condition
VDD=15V, IO=50mA VDD=12.5V, IO=-50mA VDD=15V, CL=1nF VDD=15V, CL=1nF VDD=15V, GATE=6V VDD=20V
Min.
60 7.5 150 30 230
Typ.
65
Max.
70 1.5
Unit
% V V ns ns mA V
250 50 18
350 90 19
RT Section
Symbol
IRT VRTTH tD-OTP
Parameter
Output Current of RT Pin Over-Temperature Protection Threshold Voltage Over-Temperature Debounce
Test Condition
RI=26K RI=26K
Min.
67 1.015 60
Typ.
70 1.050 100
Max.
73 1.085 140
Unit
A V s
(c) System General Corp. Version 1.4.2 (IAO33.0026.B6)
-6-
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Product Specification Highly Integrated Green-Mode PWM Controller
SG5842A/JA
TYPICAL CHARACTERISTICS
Start-up Current (IDD-ST) vs Temperature
30 26 5.0 4.5
Operating Supply Current (IDD-OP) vs Temperature
IDD-ST (uA)
22 18 14 10 -40 -25 -10 5 20 35 50 65 80 95 110 125
IDD-OP (m A)
4.0 3.5 3.0 2.5 -40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature ()
Temperature ()
Operation Current (IDD-OP) vs VDD Voltage
15 12
17.5
Start Threshold Voltage (V DD-ON) vs Temperature
IDD-OP (m A)
17.0
9
GATE = 1000pF
VDD-ON (V)
16.5
6 3 0 12 13 14 15 16 17 18 19 20 21 22 23 24
GATE = OPEN
16.0
15.5 -40 -25 -10 5 20 35 50 65 80 95 110 125
VDD Voltage (V)
Tem perature ()
M in. Operating Voltage (VDD-OFF) v s Tem perature
11.5 68 67 11.0
PWM Frequency (Fosc) vs Temperature
VDD-OFF (V)
Fosc (Khz)
-40 -25 -10 5 20 35 50 65 80 95 110 125
66 65 64 63 62 -40 -25 -10 5 20 35 50 65 80 95 110 125
10.5
10.0
9.5
Tem perature ()
Temperature ()
(c) System General Corp. Version 1.4.2 (IAO33.0026.B6)
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www.sg.com.tw * www.fairchildsemi.com October 30, 2007
Product Specification Highly Integrated Green-Mode PWM Controller
SG5842A/JA
Max. Duty Cycle (DCY MA X . ) vs Temperature
70 68
Trigger Voltage for Over-temperature Protection (VRTTH) vs Temperature
1.085 1.075
DCYMAX. (%)
66 64 62 60 -40 -25 -10 5 20 35 50 65 80 95 110 125
V(RTTH) (V)
1.065 1.055 1.045 1.035 1.025 1.015 -40 -25 -10 5 20 35 50 65 80 95 110 125
Tem perature ()
Temperature ()
Output Current of RT pin (I RT) vs Temperature
73 72 71
IRT (uA)
70 69 68 67 -40 -25 -10 5 20 35 50 65 80 95 110 125
Tem perature ()
(c) System General Corp. Version 1.4.2 (IAO33.0026.B6)
-8-
www.sg.com.tw * www.fairchildsemi.com October 30, 2007
Product Specification Highly Integrated Green-Mode PWM Controller
SG5842A/JA Leading-Edge Blanking
Each time the power MOSFET is switched on, a turn-on spike occurs at the sense-resistor. To avoid premature termination of the switching pulse, a leading-edge blanking time is built in. During this blanking period, the current-limit comparator is disabled and cannot switch off the gate drive.
OPERATION DESCRIPTION Start-up Current
The typical start-up current is only 14A, which allows a high-resistance, low-wattage start-up resistor to be used to minimize power loss. A 1.5M, 0.25W, start-up resistor and a 10F/25V VDD hold-up capacitor are sufficient for an AC/DC adapter with a universal input range.
Operating Current
The required operating current has been reduced to 4mA. This results in higher efficiency and reduces the VDD hold-up capacitance requirement.
Under-Voltage Lockout (UVLO)
The turn-on/turn-off thresholds are fixed internally at 16.5V/10.5V. To enable a SG5842A/JA controller during start-up, the hold-up capacitor must first be charged to 16.5V through the start-up resistor. The hold-up capacitor continues to supply VDD before energy can be delivered from the auxiliary winding of the main transformer. VDD must not drop below 10.5V during this start-up process. This UVLO hysteresis window ensures that the hold-up capacitor can adequately supply VDD during start-up.
Green-Mode Operation
The proprietary green-mode function provides off-time modulation to continuously decrease the PWM frequency under light-load conditions. To avoid acoustic noise problems, the minimum PWM frequency is set above 22KHz. This green-mode function dramatically reduces power consumption under light-load and zero-load conditions. Power supplies using a SG5842A/JA controller can meet even the most restrictive international regulations regarding standby power consumption.
Gate Output / Soft Driving
The SG5842A/JA BiCMOS output stage is a fast totem pole gate driver. Cross-conduction has been avoided to minimize heat dissipation, increase efficiency, and enhance reliability. The output driver is clamped by an internal 18V Zener diode to protect the power MOSFET transistors from any harmful over-voltage gate signals. A soft driving waveform is implemented to minimize EMI.
Oscillator Operation
A resistor connected from the RI pin to the GND pin generates a constant current source for the SG5842A/JA controller. This current is used to determine the center PWM frequency. Increasing the resistance reduces PWM frequency. Using a 26K resistor, RI, results in a corresponding 65KHz PWM frequency. The relationship between RI and the switching frequency is:
Slope Compensation
The sensed voltage across the current sense resistor is used for peak-current-mode control and cycle-by-cycle current limiting. The built-in slope compensation function improves power supply stability and prevents peak-current-mode control from causing sub-harmonic oscillations. Within every switching cycle, the SG5842A/JA controller produces a positively sloped, synchronized ramp signal.
fPWM
=
1690 RI (K )
(KHz) ----------------------------
(1)
The range of the PWM oscillation frequency is designed as 47KHz ~ 109KHz. SG5842JA also integrates frequency hopping function internally. The frequency variation ranges from around 62KHz to 68KHz for a center frequency of 65KHz. The frequency hopping function helps reduce EMI emission of a power supply with minimum line filters.
(c) System General Corp. Version 1.4.2 (IAO33.0026.B6)
-9-
www.sg.com.tw * www.fairchildsemi.com October 30, 2007
Product Specification Highly Integrated Green-Mode PWM Controller
SG5842A/JA Protection Latch Circuit
For the SG5842A/JA family, the built-in latch function provides a versatile protection feature that does not require external components (see ordering information for a detailed description). To reset the latch circuit, disconnect the AC line voltage of the power supply.
Constant Output Power Limit
When the SENSE voltage, across the sense resistor RS, reaches the threshold voltage, around 0.85V, the output GATE drive is turned off after a small delay tPD. This delay introduces additional current, proportional to tPD * VIN / LP. Since the delay is nearly constant regardless of the input voltage VIN. Higher input voltage results in a larger additional current and the output power limit is also higher than under low input line voltage. To compensate this variation for a wide AC input range, a sawtooth power-limiter (saw limiter) is designed to solve the unequal power-limit problem. The saw limiter is designed as a positive ramp signal (VLIMIT_RAMP) and is fed to the inverting input of the OCP comparator. This results in a lower current limit at high-line inputs than at low-line inputs.
Thermal Protection
An external NTC thermistor can be connected from the RT pin to ground. A fixed current, IRT, is sourced from the RT pin. Because the impedance of the NTC decreases at high temperatures, when the voltage of the RT pin drops below 1.05V, PWM output is latched off. The RT pin output current is related to the PWM frequency programming resistor RI.
VDD Over-Voltage Protection
VDD over-voltage protection has been built in to prevent damage due to abnormal conditions. Once the VDD voltage is over than the VDD over-voltage protection voltage (VDD-OVP) and lasts for tD-OVP, the PWM pulses is latched off. The PWM pulses stay latched off until the user unplugs the power supply from the mains outlet.
Noise Immunity
Noise from the current sense or the control signal may cause significant pulse width jitter, particularly in continuous-conduction mode. Slope compensation helps alleviate this problem. Good placement and layout practices should be followed. Avoid long PCB traces and component leads. Compensation and filter components should be located near the SG5842A/JA. Finally, increasing the power-MOS gate resistance is advised.
Limited Power Control
The FB voltage increases every time the output of the power supply is shorted or over loaded. If the FB voltage remains higher than a built-in threshold longer than tD-OLP, PWM output is turned off. As PWM output is turned off, the supply voltage VDD begins decreasing.
t D - OLP (ms)
= 2 .154 x R I (K ) -----------------
(2)
When VDD goes below the turn-off threshold (eg, 10.5V) the controller is totally shut down. VDD is charged up to the turn-on threshold voltage of 16.5V through the start-up resistor until PWM output is restarted. This protection feature remains activated as long as the over-loading condition persists. This prevents the power supply from overheating due to over loading conditions.
(c) System General Corp. Version 1.4.2 (IAO33.0026.B6)
- 10 -
www.sg.com.tw * www.fairchildsemi.com October 30, 2007
Product Specification Highly Integrated Green-Mode PWM Controller
SG5842A/JA
REFERENCE CIRCUIT
2 Q1 1 2 4 2 4 L1 VZ1 C1 L2 C2 4 1 2 C4 TR1 1 3 1 3 3 + C3 1 R3 2 2 D3 +C8 R6 C6 R4 C7 + T1 3 2 1 L3 2 1 Vo+ D1
CN1 1 2 3
BD1
C5 R1 R5
1
1
1
D2 2
2
D4 R2 R7 2 U1 1 2 3 4 R9 GND GATE FB VDD 8 7 6 5 R11 R10 C11 THER2 C9 2 + R8 1 R16 1 R12 3 Q2
VIN SENSE RI RT
SG5842A/JA
1
4
U2
1
R13 3 K2 C10 R14 R15 A
U3
R
VO+
BOM
Reference
BD1 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 D1 D2 D3 D4 F1 L1 L2 L3 Q1
Component
BD 4A/600V XC 0.68F/300V XC 0.1F/300V CC 0.01F/500V EC 120/400V YC 222p/250V CC 1000pF/100V EC 1000F/25V EC 470F/25V EC 10F/50V CC 222pF/50V CC 470pF/50V LED Diode BYV95C TVS P6KE16A Diode FR103 FUSE 4A/250V Choke (900H) Choke (10mH) Inductor (2H) Diode 20A/100V
Reference
Q2 R1,R2,R5,R7 R3 R4 R6 R8 R9 R10 R11 R12 R13 R14 R15 R16 THER2 T1 U1 U2 U3 VZ1
Component
MOS 7A/600V R 470Kohm 1/4W R 100Kohm 1/2W R 47ohm 1/4W R 2Kohm 1/8W R 0.3ohm 2W R 33Kohm 1/8W R 4.7Kohm 1/8W R 470ohm 1/8W R 0 ohm 1/8W R 4.7Kohm 1/8W R 154Kohm 1/8W 1% R 39Kohm 1/8W 1% R 100ohm 1/8W Thermistor TTC104 Transformer (600H-PQ2620) IC SG5842A/JA IC PC817 IC TL431 VZ 9G
(c) System General Corp. Version 1.4.2 (IAO33.0026.B6)
- 11 -
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2
Product Specification Highly Integrated Green-Mode PWM Controller
SG5842A/JA
PACKAGE INFORMATION 8PINS-DIP(D)
D
8 5
X
E1
E
eB
1
4
A1
A2
L b1 b e
Dimensions
Millimeters Min. Typ.
0.381 3.175 3.302 1.524 0.457 9.017 6.223 2.921 8.509 0 9.271 7.620 6.350 2.540 3.302 9.017 7 3.810 9.525 15 0.115 0.335 0 6.477 0.245 10.160 0.355 3.429
A
Inches Min.
0.015 0.125 0.130 0.060 0.018 0.365 0.300 0.250 0.100 0.130 0.355 7 0.150 0.375 15 0.255 0.400 0.135
Symbol
A A1 A2 b b1 D E E1 e L eB
Max.
5.334
Typ.
Max.
0.210
(c) System General Corp. Version 1.4.2 (IAO33.0026.B6)
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Product Specification Highly Integrated Green-Mode PWM Controller
SG5842A/JA
8PINS-SOP(S)
C
8
5
1 b
4 e
D
A1
A
Dimensions
Symbol
A A1 b c D E e F H L
Millimeter Min. Typ.
1.346 0.101 0.406 0.203 4.648 3.810 1.016 5.791 0.406 0
Max.
1.752 0.254
1.270 0.381X45
4.978 3.987 1.524 6.197 1.270 8
(c) System General Corp. Version 1.4.2 (IAO33.0026.B6)
H F
E
L
Inch Min.
0.053 0.004
Typ.
0.016 0.008
Max.
0.069 0.010
0.183 0.150 0.040 0.228 0.016 0
0.050 0.015X45
0.196 0.157 0.060 0.244 0.050 8
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www.sg.com.tw * www.fairchildsemi.com October 30, 2007
Product Specification Highly Integrated Green-Mode PWM Controller
SG5842A/JA
(c) System General Corp. Version 1.4.2 (IAO33.0026.B6)
- 14 -
www.sg.com.tw * www.fairchildsemi.com October 30, 2007

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